Integrated Circuits and Systems Group
... where MEMS meet Transistors

People

Hossein Fariborzi

Principal Investigator
Assistant Professor of Electrical Engineering

Research Interests

​Ultra-low power Integrated Circuits and Systems, MEMS/NEMS IC design and fabrication, Novel switching devices for next generation ICs 

Selected Publications

H. Fariborzi, F. Chen, R. Nathanael, R. Lee, T.-J.K. Liu, V. Stojanovic, "Relays Do Not Leak, CMOS Does," in IEEE Design Automation Conference (DAC), (Featured presentation and video demonstration), Austin, TX, June 2013.
H. Fariborzi, F. Chen, I-R. Chen, R. Nathanael, R. Lee, T.-J.K. Liu, V. Stojanovic, "Scaled Micro-Electro-Mechanical Relay Circuits and Systems," IEEE International Solid State Circuits Conference ISSCC (SRP poster and short presentation), San Francisco, 2013.
M. Spencer, F. Chen, H. Fariborzi, R. Nathanael, C.Wang, A. Gupta, H. Kam, V. Pott, J. Jeon, T.-J. K. Liu, D. Marković, E. Alon, and V. Stojanović, "Demonstration of Integrated Micro-Electro-Mechanical Relay Circuits for VLSI Applications," IEEE Journal of Solid-State Circuits, 2011.
H. Fariborzi, M. Spencer, V. Karkare, J. Jeon, R. Nathanael, C. Wang, F. Chen, H. Kam, V. Pott, T.-j. K. Liu, E. Alon, V. Stojanović, and D. Marković, "Analysis and demonstration of MEM-relay power gating," Custom Integrated Circuits Conference (CICC), 2010 IEEE, San Jose, CA.
F. Chen, M. Spencer, R. Nathanael, H. Fariborzi, C.Wang, A. Gupta, H. Kam, V. Pott, J. Jeon, T.-J. K. Liu, D. Marković, V. Stojanović, and E. Alon, "Demonstration of Integrated Micro-Electro-Mechanical (MEM) Switch Circuits for VLSI Applications," International Solid State Circuits Conference ISSCC, San Francisco, 2010.
H. Fariborzi, M. Moghavvemi; "Energy Aware Multi-tree Routing for Wireless Sensor Networks" IET Journal of Communications, Vol. 3(5), 2009.

Education

  • PhD: Massachusetts Institute of Technology (MIT), June 2013
  • MScUniversity of Malaya, Malaysia, July 2008
  • BSc: Sharif University of Technology, Iran, June 2006

Professional Profile

  • ​Aug 2013-Sep 2014: Oracle/Sun Microsystems, Burlington, MA
  • May-Sep 2012: Intel, Santa Clara (Graduate Intern)
  • Jan 2006- Jan 2007: Designer and RF Engineer, RF Design & Network Optimization Dept., Nokia, Iran

Awards

​2013: IEEE ISSCC Student-Research Preview Paper (SRP) Award
2010: Jack Raper best paper award in Technology Direction, IEEE International Solid State Circuits Conference ISSCC 2010
2008: Irwin Mark Jacobs presidential fellowship award, Massachusetts Institute of Technology
2007-2008: Silver and Gold medals, Malaysia’s Invention and Innovation Exhibition, ITEX 2007
2007: Sultanate SCHEME fellowship, University of Malaya, Malaysia
2001: Ranked 12th in the Iranian national university entrance examination among 650,000 applicants

KAUST Affiliations

​Computer, Electrical and Mathematical Sciences & Engineering (cemse.kaust.edu.sa)